TC1303B-AO2EUN datasheet(15/30 Pages) MICROCHIP

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DS21949A-page 15

TC1303B

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

3.1

LDO Shutdown Input Pin (SHDN2)

SHDN2 is a logic level input used to turn the LDO Reg-

ulator on and off. A logic high (> 45% of VIN), will enable

the regulator output. A logic low (< 15% of VIN) will

ensure that the output is turned off.

3.2

LDO Input Voltage Pin (VIN2)

VIN2 is a LDO power input supply pin. Connect variable

input voltage source to VIN2. Connect VIN1 and VIN2

together with board traces as short as possible. VIN2

provides the input voltage for the LDO regulator. An

additional capacitor can be added to lower the LDO

regulator input ripple voltage.

3.3

LDO Output Voltage Pin (VOUT2)

VOUT2 is a regulated LDO output voltage pin. Connect

a 1 µF or larger capacitor to VOUT2 and AGND for proper

operation.

3.4

Power-Good Output Pin (PG)

PG is an output level indicating that VOUT2 (LDO) is

within 94% of regulation. The PG output is configured

as a push-pull for the TC1303B.

3.5

Analog Ground Pin (AGND)

AGND is the analog ground connection. Tie AGND to the

analog portion of the ground plane (AGND). See the

physical layout information in Section 5.0 “Application

Circuits/Issues” for grounding recommendations.

3.6

Buck Regulator Output Sense Pin

(VFB/VOUT1)

For VOUT1 adjustable output voltage options, connect

the center of the output voltage divider to the VFB pin.

For fixed-output voltage options, connect the output of

the buck regulator to this pin (VOUT1).

3.7

Buck Regulator Shutdown Input

Pin (SHDN1)

SHDN1 is a logic level input used to turn the buck

regulator on and off. A logic-high (> 45% of VIN), will

enable the regulator output. A logic-low (< 15% of VIN)

will ensure that the output is turned off.

3.8

Buck Regulator Input Voltage Pin

(VIN1)

VIN1 is the buck regulator power input supply pin.

Connect a variable input voltage source to VIN1.

Connect VIN1 and VIN2 together with board traces as

short as possible.

3.9

Buck Inductor Output Pin (LX)

Connect LX directly to the buck inductor. This pin

carries large signal-level current; all connections

should be made as short as possible.

3.10

Power Ground Pin (PGND)

Connect all large-signal level ground returns to PGND.

These large-signal, level ground traces should have a

small loop area and length to prevent coupling of

switching noise to sensitive traces. Please see the

physical layout information supplied in Section 5.0

“Application

Circuits/Issues”

for

grounding

recommendations.

3.11

Exposed Pad (EP)

For the DFN package, connect the EP to AGND with

vias into the AGND plane.

Pin No.

Name

Function

SHDN2

Active Low Shutdown Input for LDO Output Pin

2VIN2

Analog Input Supply Voltage Pin

3VOUT2

LDO Output Voltage Pin

Power-good Output Pin

5AGND

Analog Ground Pin

6VFB / VOUT1 Buck Feedback Voltage (Adjustable Version) / Buck Output Voltage (Fixed Version) Pin

SHDN1

Active Low Shutdown Input for Buck Regulator Output Pin

8VIN1

Buck Regulator Input Voltage Pin

9LX

Buck Inductor Output Pin

PGND

Power Ground Pin

Exposed

Pad

For the DFN package, the center exposed pad is a thermal path to remove heat from the

device. Electrically this pad is at ground potential and should be connected to AGND.

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