PIC16F946-ESLASHMLQTP datasheet(38/330 Pages) MICROCHIP

38 / 330 page

PIC16F913/914/916/917/946

DS41250F-page 36

2.2.2.5

PIE2 Register

The PIE2 register contains the interrupt enable bits, as

shown in Register 2-5.

Note:

Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2

R/W-0

U-0

R/W-0

U-0

R/W-0

OSFIE

C2IE

C1IE

LCDIE

—LVDIE

—CCP2IE(1)

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

OSFIE: Oscillator Fail Interrupt Enable bit

= Enables oscillator fail interrupt

= Disables oscillator fail interrupt

bit 6

C2IE: Comparator C2 Interrupt Enable bit

= Enables Comparator C2 interrupt

= Disables Comparator C2 interrupt

bit 5

C1IE: Comparator C1 Interrupt Enable bit

= Enables Comparator C1 interrupt

= Disables Comparator C1 interrupt

bit 4

LCDIE: LCD Module Interrupt Enable bit

= Enables LCD interrupt

= Disables LCD interrupt

bit 3

Unimplemented: Read as ‘0’

bit 2

LVDIE: Low Voltage Detect Interrupt Enable bit

= Enables LVD Interrupt

= Disables LVD Interrupt

bit 1

Unimplemented: Read as ‘0’

bit 0

CCP2IE: CCP2 Interrupt Enable bit(1)

= Enables the CCP2 interrupt

= Disables the CCP2 interrupt

Note 1:

PIC16F914/PIC16F917/PIC16F946 only.

PIC16F946-E/MLQTP Datasheet(PDF) 38 Page - Microchip Technology

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