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PIC16F946-E/MLQTP Datasheet(PDF) 54 Page - Microchip Technology |
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PIC16F946-E/MLQTP Datasheet(HTML) 54 Page - Microchip Technology |
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54 / 330 page  PIC16F913/914/916/917/946 DS41250F-page 52 © 2007 Microchip Technology Inc. 3.2.1.8 RA7/OSC1/CLKIN/T1OSI Figure 3-8 shows the diagram for this pin. The RA7 pin is configurable to function as one of the following: • a general purpose I/O • a crystal/resonator connection • a clock input • a Timer1 oscillator connection FIGURE 3-8: BLOCK DIAGRAM OF RA7 TABLE 3-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets ADCON0 ADFM VCFG1 VCFG0 CHS2 CHS1 CHS0 GO/DONE ADON 0000 0000 0000 0000 ANSEL ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 1111 1111 1111 1111 CMCON0 C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 0000 0000 0000 0000 CONFIG(1) CPD CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0 — — OPTION_REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 LCDCON LCDEN SLPEN WERR VLCDEN CS1 CS0 LMUX1 LMUX0 0001 0011 0001 0011 LCDSE0 SE7 SE6 SE5 SE4 SE3 SE2 SE1 SE0 0000 0000 uuuu uuuu LCDSE1 SE15 SE14 SE13 SE12 SE11 SE10 SE9 SE8 0000 0000 uuuu uuuu PORTA RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 xxxx xxxx uuuu uuuu SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 T1CON T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA. Note 1: See Configuration Word register (CONFIG) for operation of all register bits. Q D Q CK Data Latch TRIS Latch RD TRISA RD PORTA Q D Q CK TTL Input Buffer Data Bus WR PORTA WR TRISA FOSC = 10x FOSC = 10x I/O Pin Oscillator Circuit To OSC2 FOSC = 011 VDD VSS |
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