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ASM330LHBG1 Datasheet(PDF) 16 Page - STMicroelectronics |
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ASM330LHBG1 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 130 page  Table 7. I²C high-speed mode specifications at 1 MHz Symbol Parameter Min. Max. Unit Fast mode plus(1) fSCL SCL clock frequency 0 1 MHz tHD;STA Hold time (repeated) START condition 260 - ns tLOW Low period of the SCL clock 500 - tHIGH High period of the SCL clock 260 - tSU;STA Setup time for a repeated START condition 260 - tHD;DAT Data hold time 0 - tSU;DAT Data setup time 50 - trDA Rise time of SDA signal - 120 tfDA Fall time of SDA signal - 120 trCL Rise time of SCL signal 20*Vdd/5.5 120 tfCL Fall time of SCL signal 20*Vdd/5.5 120 tSU;STO Setup time for STOP condition 260 - Cb Capacitive load for each bus line - 550 pF tVD;DAT Data valid time - 450 ns tVD;ACK Data valid acknowledge time - 450 VnL Noise margin at low level 0.1Vdd - V VnH Noise margin at high level 0.2Vdd - tSP Pulse width of spikes that must be suppressed by the input filter 0 50 ns 1. Data based on characterization, not tested in production ASM330LHBG1 Module specifications DS14080 - Rev 1 page 16/130 |
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