P4C165 datasheet(1/9 Pages) PYRAMID

Part #	P4C165

Description	ULTRA HIGH SPEED 8K x 8 RESETTABLE STATIC CMOS RAM

PDF	9 Pages

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Manufacturer	PYRAMID [Pyramid Semiconductor Corporation]

Direct Link	http://www.pyramidsemiconductor.com

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Document # SRAM117 Rev OR

Revised October 2005

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 15/20/25 ns (Commercial)

– 20/25/35 (Industrial)

Low Power Operation

Chip Clear Function

Output Enable and Dual Chip Enable Control

Functions

Single 5V±10% Power Supply

Common Data I/O

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 28-Pin Plastic DIP (300 mil)

P4C165

ULTRA HIGH SPEED 8K x 8

RESETTABLE STATIC CMOS RAM

DESCRIPTION

The P4C165 is a 65,536-bit ultra high-speed static RAM

organized as 8K x 8. The RAM features a reset control to

enable clearing all words to zero within two cycle times.

The CMOS memory requires no clocks or refreshing and

has equal access and cycle times. Inputs are fully TTL-

compatible. The RAM operates from a single 5V±10%

tolerance power supply.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

1519B

DIP (P5)

Access times as fast as 15 nanoseconds are available,

permitting greatly enhanced system operating speeds.

In full standby mode with CMOS inputs, power consump-

tion is only 5.5 mW for the P4C165.

The P4C165 is available in a 28-pin 300 mil DIP.

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P4C165 Datasheet(PDF) 1 Page - Pyramid Semiconductor Corporation

P4C165 Datasheet(HTML) 1 Page - Pyramid Semiconductor Corporation

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