 2002 Microchip Technology Inc.

Preliminary

DS39588A-page 9

PIC16F72

3.0

CONFIGURATION WORD

The PIC16F72 has configuration bits in a configuration

word located at 0x2007. These bits can be cleared

(reads ‘0’), or left unchanged (reads ‘1’), to select vari-

ous device configurations.

3.1

Device ID Word

The device ID word for the PIC16F72 is located at

2006h. The nine Most Significant bits are the device ID

number, while the five Least Significant bits are the

device revision number.

REGISTER 3-1:

CONFIGURATION WORD FOR PIC16F72

TABLE 3-1:

DEVICE ID VALUE

Device

Device ID Word (0x2006)

Dev

Rev

PIC16F72

000 000 101

n nnnn

–

–

–

–

–

–

–

BOREN

–

CP

PWRTEN WDTEN F0SC1 F0SC0

bit 13

bit 0

bit 13-7

Unimplemented: Read as ‘1’

bit 6

1

= BOR enabled

0

= BOR disabled

bit 5

Unimplemented: Read as ‘1’

bit 4

CP: Program Memory Code Protection bit

1

= Code protection off

0

= 0000h to 07FFh code protected (All)

bit 3

1

= PWRT disabled

0

= PWRT enabled

bit 2

WDTEN: Watchdog Timer Enable bit

1

= WDT enabled

0

= WDT disabled

bit 1-0

FOSC1:FOSC0: Oscillator Selection bits

11

= RC oscillator

10

= HS oscillator

01

= XT oscillator

00

= LP oscillator

Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the

value of bit PWRTEN. Ensure the Power-up Timer is enabled any time Brown-out Reset is

enabled.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

1 = bit is set

0 = bit is cleared

x = bit is unknown