CAT25010LET3 datasheet(7/17 Pages) CATALYST

7 / 17 page

CAT25010, CAT25020, CAT25040

Doc. No. MD-1006 Rev. T

Characteristics subject to change without notice

Byte Write

Once the WEL bit is set, the user may execute a write

sequence, by sending a WRITE instruction, a 8-bit

address and data as shown in Figure 4. For the

CAT25040, bit 3 of the write instruction opcode

contains A8 address bit. Internal programming will

start after the low to high CS

¯¯ transition. During an

internal write cycle, all commands, except for RDSR

(Read Status Register) will be ignored. The RDY

¯¯¯¯ bit

will indicate if the internal write cycle is in progress

(RDY

¯¯¯¯ high), or the the device is ready to accept

commands (RDY

¯¯¯¯ low).

Page Write

After

sending

the

first

data

byte

the

CAT25010/20/40, the host may continue sending

data, up to a total of 16 bytes, according to timing

shown in Figure 5. After each data byte, the lower

order address bits are automatically incremented,

while the higher order address bits (page address)

remain unchanged. If during this process the end of

page is exceeded, then loading will “roll over” to the

first byte in the page, thus possibly overwriting

previoualy loaded data. Following completion of the

write cycle, the CAT25010/20/40 is automatically

returned to the write disable state.

Figure 4. Byte WRITE Timing

Notes:

Dashed Line = mode (1, 1) - - - - - -

* X = 0 for CAT25010, CAT25020. x = A8 for CAT25040

Figure 5. Page WRITE Timing

Notes:

Dashed Line = mode (1, 1) - - - - - -

* X = 0 for CAT25010, CAT25020. x = A8 for CAT25040

SCK

D7 D6 D5 D4 D3 D2 D1 D0

012345678

OPCODE

DATA IN

HIGH IMPEDANCE

BYTE ADDRESS

14 15

18 19

22 23

SCK

BYTE ADDRESS

Data

Byte 1

01234

5678

15 16-23 24-31

Data

Byte 2

Data

Byte 3

Data Byte N

OPCODE

7..1

16+(N-1)x8-1..16+(N-1)x8 16+Nx8-1

DATA IN

HIGH IMPEDANCE

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