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ST10F272Z2Q3 Datasheet(PDF) 7 Page - STMicroelectronics

Part # ST10F272Z2Q3
Description  16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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ST10F272Z2Q3 Datasheet(HTML) 7 Page - STMicroelectronics

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ST10F272
List of tables
7/179
List of tables
Table 1.
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 2.
Summary of IFLASH address range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 3.
Address space reserved to the Flash module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 4.
Flash modules sectorization (Read operations) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 5.
Flash modules sectorization
(Write operations or with ROMS1=’1’ or BootStrap mode)27
Table 6.
Control register interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 7.
Flash control register 0 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 8.
Flash control register 0 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 9.
Flash control register 1 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 10.
Flash control register 1 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 12.
Flash data register 0 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 13.
Flash data register 0 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 14.
Flash data register 1 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 15.
Flash data register 1 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 16.
Flash address register low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 17.
Flash address register high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18.
Flash error register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 19.
Flash non volatile write protection I register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 20.
Flash non volatile access protection register 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 21.
Flash non volatile access protection register 1 low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 22.
Flash non volatile access protection register 1 high . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 23.
XBus flash volatile temporary access unprotection register . . . . . . . . . . . . . . . . . . . . . . . 39
Table 24.
Flash write operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 25.
ST10F272 boot mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 26.
Standard instruction set summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 27.
MAC instruction set summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 28.
Interrupt sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 29.
X-Interrupt detailed mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 30.
Trap priorities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 31.
Compare modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 32.
CAPCOM timer input frequencies, resolutions and periods at 40 MHz . . . . . . . . . . . . . . . 59
Table 33.
CAPCOM timer input frequencies, resolutions and periods at 64 MHz . . . . . . . . . . . . . . . 59
Table 34.
GPT1 timer input frequencies, resolutions and periods at 40 MHz. . . . . . . . . . . . . . . . . . . 60
Table 35.
GPT1 timer input frequencies, resolutions and periods at 64 MHz. . . . . . . . . . . . . . . . . . . 61
Table 36.
GPT2 timer input frequencies, resolutions and periods at 40 MHz. . . . . . . . . . . . . . . . . . . 62
Table 37.
GPT2 timer input frequencies, resolutions and periods at 64 MHz. . . . . . . . . . . . . . . . . . . 62
Table 38.
PWM unit frequencies and resolutions at 40 MHz CPU clock . . . . . . . . . . . . . . . . . . . . . . 64
Table 39.
PWM unit frequencies and resolutions at 64 MHz CPU clock . . . . . . . . . . . . . . . . . . . . . . 64
Table 40.
ASC asynchronous baud rates by reload value and deviation errors (fCPU = 40 MHz) . . 70
Table 41.
ASC asynchronous baud rates by reload value and deviation errors (fCPU = 64 MHz) . . 71
Table 42.
ASC synchronous baud rates by reload value and deviation errors (fCPU = 40 MHz) . . . 71
Table 43.
ASC synchronous baud rates by reload value and deviation errors (fCPU = 64 MHz) . . . 72
Table 44.
Synchronous baud rate and reload values (fCPU = 40 MHz). . . . . . . . . . . . . . . . . . . . . . . 73
Table 45.
Synchronous baud rate and reload values (fCPU = 64 MHz). . . . . . . . . . . . . . . . . . . . . . . 73
Table 46.
WDTREL reload value (fCPU = 40 MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 47.
WDTREL reload value (fCPU = 64 MHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 48.
Reset event definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80


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