GL800HT25 USB 2.0 UTMI Compliant Transceiver IP Core

©2000-2003 Genesys Logic Inc.—All rights reserved.

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CHAPTER 5

FUNCTIONAL DESCRIPTION

5.1 Transmit Operation

5.1.1 Transmit State Diagram

Figure 5.1 - Transmit State Diagram

Transmit must be asserted to enable any transmissions.

The SIE asserts TXVLD to begin a transmission.

The SIE negates TXVLD to end a transmission.

After the SIE asserts TXVLD it can assume that the transmission has started when it detects TXRDY

asserted.

The SIE assumes that the UTM has consumed a data byte if TXRDY and TXVLD are asserted.

The SIE must have valid packet information (PID) asserted on the Data bus coincident with the assertion

of TXVLD. Depending on the UTM implementation, TXRDY may be asserted by the Transmit State

Machine as soon as one CLK after the assertion of TXVLD.

TXVLD and TXRDY are sampled on the rising edge of CLK30.

The Transmit State Machine does not automatically generate Packet ID’s (PIDs) or CRC.

When transmitting, the SIE is always expected to present a PID as the first byte of the data stream and if

appropriate, CRC as the last bytes of the data stream.

The SIE must use LINEST0/1 to verify a Bus Idle condition before asserting TXVLD in the TX Wait state.

Reset

!TXRDY

TX Wait

Send SYNC

TX Data Load

TXRDY

TX Data Wait

!TXRDY

Send EOP

!TXRDY

HRST#

!HRST#

TXVLD

!TXVLD

TX Hold

Reg

Empty

TX Hold

Reg Full

TX Hold

Reg

Empty

TX Hold

Reg Full

EOP not

done

!TXVLD