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GL830 Datasheet(PDF) 22 Page - GENESYS LOGIC |
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GL830 Datasheet(HTML) 22 Page - GENESYS LOGIC |
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22 / 29 page ![]() GL830 USB2.0 to SATA Bridge Controller ©2007 Genesys Logic Inc. - All rights reserved. Page 22 CHAPTER 4 BLOCK DIAGRAM 8051 Core ROM RAM GPIO SPI Operation Register USB Transport Layer Link Layer PHY Layer UTM SIE Bulk Buffer EP0/3 FIFO Controller Application Layer SATA eSATA PATA Figure 4.1 - Block Diagram |
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