Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

RT9210GS Datasheet(PDF) 7 Page - Richtek Technology Corporation

Part # RT9210GS
Description  Dual 5V Synchronous Buck DC-DC PWM Controller for DDR Memory VDDQ and VTT Termination
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT9210GS Datasheet(HTML) 7 Page - Richtek Technology Corporation

Back Button RT9210GS Datasheet HTML 3Page - Richtek Technology Corporation RT9210GS Datasheet HTML 4Page - Richtek Technology Corporation RT9210GS Datasheet HTML 5Page - Richtek Technology Corporation RT9210GS Datasheet HTML 6Page - Richtek Technology Corporation RT9210GS Datasheet HTML 7Page - Richtek Technology Corporation RT9210GS Datasheet HTML 8Page - Richtek Technology Corporation RT9210GS Datasheet HTML 9Page - Richtek Technology Corporation RT9210GS Datasheet HTML 10Page - Richtek Technology Corporation RT9210GS Datasheet HTML 11Page - Richtek Technology Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 17 page
background image
RT9210
Preliminary
DS9210-05 March 2007
7
www.richtek.com
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Window Regulator
Load Current
ILOAD
--
±10
--
mA
Output Voltage Error
ΔVOUT
V2_SD = VCC,
±10mA load on V2
--
± 7
--
%
PWM Controller Gate Drivers
Upper Gate Source (UGATE1 and 2)
RUGATE
BOOT = 10V
BOOT
− VUGATE = 1V
--
7
--
Ω
Upper Gate Sink (UGATE1 and 2)
RUGATE
VUGATE = 1V
--
5
--
Ω
Lower Gate Source (LGATE1 and 2)
RLGATE
VCC − VLGATE = 1V
--
4
--
Ω
Lower Gate Sink (LGATE1 and 2)
RLGATE
VLGATE = 1V
--
2
--
Ω
Upper Gate Rising Time (UGATE1 and 2) TR_UGATE CLoad = 3.3nF
--
70
--
ns
Upper Gate Falling Time (UGATE1 and 2) TF_UGATE CLoad = 3.3nF
--
50
--
ns
Lower Gate Rising Time (LGATE1 and 2) TR_LGATE CLoad = 3.3nF
--
50
--
ns
Lower Gate Falling Time (LGATE1 and 2) TF_LGATE CLoad = 3.3nF
--
32
--
ns
Dead Time
TDT
--
--
100
ns
Protection
FB1 Over-Voltage Trip
ΔFB1OVT FB1 Rising
125
137.5
--
%
FB1 Under-Voltage Trip
ΔFB1UVT FB1 Falling
--
62.5
75
%
OCSET/SD Current Source
IOCSET
VOCSET/ SD = 4.5V
34
40
46
μA
OCP Blocking Time
--
320
540
ns
Logic-Low Voltage
VIL
Shutdown
--
--
0.2
OCSET/SD
Logic-High Voltage
VIH
Enable
2.0
--
--
V
Soft-Start Interval
TSS
--
4
--
ms
Power Good
Upper Threshold
VPGOOD+ FB1 & Sense2 Rising
110
115
120
%
Lower Threshold
VPGOOD- FB1 & Sense2 Rising
80
85
90
%
Note 1.
Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2.
Devices are ESD sensitive. Handling precaution recommended.
Note 3.
The device is not guaranteed to function outside its operating conditions.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com