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RT9259CGS Datasheet(PDF) 10 Page - Richtek Technology Corporation

Part # RT9259CGS
Description  12V Synchronous Buck PWM DC-DC and Linear Power Controller
PDF  15 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT9259CGS Datasheet(HTML) 10 Page - Richtek Technology Corporation

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RT9259C
10
DS9259C-03
August 2007
www.richtek.com
1) Modulator Frequency Equations
The modulator transfer function is the small-signal transfer
function of VOUT/VCOMP (output voltage over the error
amplifier output. This transfer function is dominated by a
DC gain, a double pole, and a zero as shown in Figure 10.
The DC gain of the modulator is the input voltage (VIN)
divided by the peak to peak oscillator voltage VOSC. The
output LC filter introduces a double pole, 40dB/decade
gain slope above its corner resonant frequency, and a total
phase lag of 180 degrees. The resonant frequency of the
LC filter expressed as :
OUT
OUT
LC
C
L
2
1
f
×
=
π
If MOSFET with RDS(ON) = 16m
Ω is used, the OCP
threshold current is about 25A. Once OCP is triggered,
the RT9259C enters hiccup mode and re-soft starts again.
The RT9259C shuts down after 4 time OCP hiccups.
Figure 7. Shorted then Start Up (Extended Figure 3)
Feedback Compensation
The RT9259C is a voltage mode controller. The control
loop is a single voltage feedback path including a
compensator and modulator as shown Figure 8. The
modulator consists of the PWM comparator and power
stage. The PWM comparator compares error amplifier EA
output (COMP) with oscillator (OSC) sawtooth wave to
provide a pulse-width modulated (PWM) with an amplitude
of VIN at the PHASE node. The PWM wave is smoothed
by the output filter LOUT and COUT. The output voltage (VOUT)
is sensed and fed to the inverting input of the error amplifier.
Figure 8. Closed Loop
Figure 6. Shorted then Start Up
Time (5
μs/Div)
UGATE
(5V/Div)
LGATE
(5V/Div)
IL
(20A/Div)
Time (2.5ms/Div)
Inductor Current
(20A/Div)
A well-designed compensator regulates the output voltage
to the reference voltage VREF with fast transient response
and good stability.
In order to achieve fast transient response and accurate
output regulation, an adequate compensator design is
necessary. The goal of the compensation network is to
provide adequate phase margin (greater than 45 degrees)
and the highest 0dB crossing frequency. It is also
recommended to manipulate loop frequency response that
its gain crosses over 0dB at a slope of
−20dB/dec.
-
+
+
-
OSC
ΔV
OSC
Z
FB
Z
IN
V
IN
Driver
Driver
REF
PWM
Comparator
COMP
EA
+
-
REF
EA
Z
FB
Z
IN
V
OUT
FB
COMP
C1
C2
C3
R1
R2
R3
ESR
PHASE
C
OUT
V
OUT
L



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