ADS1174IPAPR datasheet(17/35 Pages) TI

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POWER-DOWN (PWDN)

NOTE:(1)InSPIprotocol,thetimingoccursonthefallingedgeof

/FSYNC.Poweringdownallchannelsforces

/FSYNChigh.

DRDY

CLK

DRDY/FSYNC

(1)

DOUT

(DiscreteDataOutputMode)

· · ·

PWDN

NDR

PDWN

-UpData

ostPower

DOUT1

(TDMMode,DynamicPosition)

NormalPosition

DataShiftPosition

NormalPosition

DataRemaininPosition

DOUT1

(TDMMode,FixedPosition)

ADS1174

ADS1178

SBAS373 – OCTOBER 2007

2. Wait for 129/fDATA after taking the PWDN pins

The ADS1174/78 measurement channels can be

high.

independently powered down by use of the PWDN

inputs. To enter the power-down mode, take the

3. Detect for non-zero data in the powered-up

respective PWDN pin low. Power-down occurs after

channel.

two fCLK cycles have elapsed. This delay guards

After

powering-up

one

channels,

the

against false transitions caused by external noise. To

channels are synchronized to each other. It is not

exit power-down, return the corresponding PWDN pin

necessary to use the SYNC pin to synchronize them.

high. Note that when all channels are powered down,

the ADS1174/78 enters a microwatt (

μW) power state

When a channel is powered down in TDM data

where all internal biasing is powered-down. In this

format, the data for the powered-down channel will

event, the TEST[1:0] input pins must be driven; all

either be forced to zero (fixed-position TDM data

other input pins can float (the ADS1174/78 outputs

mode) or be replaced by shifting the data from the

remain driven).

channel

into

the

vacated

data

position

(dynamic-position TDM data mode).

As shown in Figure 15 and Table 10, a maximum of

129 conversion cycles must elapse before reading

In discrete data format, the data are always forced to

data

after

exiting

power-down.

The

data

from

zero.

When

powering-up

channel

channels already running are not affected. The user

dynamic-position TDM data format mode, the channel

software can perform the required delay time in the

data remain packed until the data are ready, at which

following ways:

time the data frame is expanded to include the

just-powered channel data. See the Data Format

1. Count the number of data conversions after

section for details.

taking the PWDN pin high.

Figure 15. Power-Down Timing

Table 10. Power-Down Timing

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

tPDWN

PDWN pulse width to enter Power-Down mode

CLK periods

Time for new data to be ready (SPI)

129

130

Conversions (1/fDATA)

tNDR

Time for new data to be ready (Frame-Sync)

128

129

Conversions (1/fDATA)

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