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TPMC632-DOC Datasheet(PDF) 2 Page - TEWS Technologies GmbH |
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TPMC632-DOC Datasheet(HTML) 2 Page - TEWS Technologies GmbH |
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2 / 3 page ![]() The Embedded I/O Company Technical Information Standard single-width 32 bit PMC module conforming to IEEE P1386.1 PCI 2.1 compliant interface 3.3V and 5V PCI Signaling Voltage Board size: 149 mm x 74 mm TPMC632-1x: Xilinx XC6SLX45T-2 Spartan6 FPGA configured by serial Flash XCF16PFS TPMC632-2x: Xilinx XC6SLX100T-2 Spartan6 FPGA configured by serial Flash XCF32PFS Flash device is programmable via JTAG and in- system programmable FPGA clock options: Local clock generator as source for the FPGA internal PLL 1 DDR3 SDRAM bank, 64M x 16 (128 MB) 32 Mbit SPI-EEPROM for User Data or FPGA configuration I/O lines 64 TTL I/O, or 32 differential I/O or 32 TTL I/O and 16 differential I/O TTL signaling voltage (maximum current: +/- 32mA), EIA-422/-485 signaling level or M-LVDS Standard (TIA/EIA-899) direction individually programmable I/O access: 64 I/O lines on HD68 front connector, parallel to up to 64 I/O lines on rear connector P14 Operating temperature -40°C to +85°C TEWS TECHNOLOGIES GmbH keeps the right to change technical specification without further notice. All trademarks mentioned are property of their respective owners. Issue 1.0.2 2017-08-31 TEWS TECHNOLOGIES GmbH Am Bahnhof 7 25469 Halstenbek, Germany Phone: +49 (0) 4101 4058 0 Fax: +49 (0) 4101 4058 19 e-mail: info@tews.com www.tews.com |
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