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TAS5342LDDVR Datasheet(PDF) 8 Page - Texas Instruments

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Part # TAS5342LDDVR
Description  100 W STEREO DIGITAL AMPLIFIER POWER STAGE
PDF  29 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS5342LDDVR Datasheet(HTML) 8 Page - Texas Instruments

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RECOMMENDED OPERATING CONDITIONS
AUDIO SPECIFICATIONS (BTL)
TAS5342L
SLAS558 – OCTOBER 2007
MIN
TYP
MAX
UNIT
PVDD_X
Half-bridge supply voltage
0
32.0
34.0
V
Supply voltage for logic regulators and
GVDD_X
10.8
12
13.2
V
gate-drive circuitry
VDD
Digital regulator supply voltage
10.8
12
13.2
V
RL (BTL)
3
4
Resistive load impedance (no Cycle-by-Cycle
RL (SE)
current control), recommended demodulation
2.25
3
Ω
filter
RL (PBTL)
1.5
2
LOutput (BTL)
5
10
Minimum output inductance under
LOutput (SE)
Output-filter inductance
5
10
μH
short-circuit condition
LOutput (PBTL)
5
10
fS
PWM frame rate
192
384
432
kHz
tLOW
Minimum low-state pulse duration per PWM
30
nS
Frame, noise shaper enabled
CPVDD
PVDD close decoupling capacitors
0.1
μF
CBST
Bootstrap capacitor, selected value supports
33
nF
PWM frame rates from 192 kHz to 432 kHz
ROC
Over-current programming resistor
Resistor tolerance = 5%
22
22
47
k
Ω
REXT-PULLUP
External pull-up resistor to +3.3V to +5.0V for
3.3
4.7
k
Ω
SD or OTW
TJ
Junction temperature
0
125
°C
Audio performance is recorded as a chipset consisting of a TAS5518 pwm processor (modulation index limited to 97.7%) and
a TAS5342L power stage. PCB and system configuraton are in accordance with recommended guidelines. Audio frequency =
1 kHz, PVDD_x = 32.0 V, GVDD_x = 12 V, RL = 4 Ω, fS = 384 kHz, ROC = 22 kΩ, TC = 75°C, Output Filter: LDEM = 10 μH,
CDEM = 470 nF, unless otherwise noted.
TAS5342L
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
RL = 4 Ω, 10% THD+N, clipped input
100
signal
RL = 6 Ω, 10% THD+N, clipped input
POMAX
Maximum Power Output
80
signal
RL = 8 Ω, 10% THD+N, clipped input
65
W
signal
RL = 4 Ω, 0 dBFS, unclipped input
80
signal
RL = 6 Ω, 0 dBFS, unclipped input
PO
Unclipped Power Output
64
signal
RL = 8 Ω, 0 dBFS, unclipped input
50
signal
0 dBFS; AES17 filter
0.4%
THD+N
Total harmonic distortion + noise
1 W; AES17 filter
0.09%
Vn
Output integrated noise
A-weighted, AES17 filter, Auto mute
μV
55
disabled
SNR
Signal-to-noise ratio (1)
A-weighted, AES17 filter, Auto mute
110
dB
disabled
A-weighted, input level = –60 dBFS,
DNR
Dynamic range
110
dB
AES17 filter
DC Offset
Output offset voltage
+/- 15
mV
Pidle
Power dissipation due to idle losses (IPVDD_X)
PO = 0 W, all halfbridges switching
(2)
3
W
(1)
SNR is calculated relative to 0-dBFS input level.
(2)
Actual system idle losses are affected by core losses of output inductors.
8
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TAS5342L



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