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TMPR4937 Datasheet(PDF) 297 Page - Toshiba Semiconductor

Part # TMPR4937
Description  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
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TMPR4937 Datasheet(HTML) 297 Page - Toshiba Semiconductor

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Chapter 10 PCI Controller
10-39
10.4.14 G2P Timeout Count Register (G2PTOCNT)
0xD040
The Retry Timeout field corresponds to the Retry Timeout Value Register of the PCI Configuration
Space, and the TRDY Timeout field corresponds to the TRDY Timeout Value Register of the PCI
Configuration Space.
This register cannot be accessed when the PCI Controller is in the Satellite mode.
31
16
Reserved
: Type
: Initial value
15
8
7
0
RETRYTO
TRDYTO
R/W
R/W
: Type
0x80
0x80
: Initial value
Bits
Mnemonic
Field Name
Description
Read/Write
31:16
Reserved
⎯
15:8
RETRYTO
Retry Timeout
Retry Time Out (Default: 0x80)
Sets the maximum number of retries to accept when operating as the
initiator on the PCI Bus. Ends with an error when receiving more retry
terminations than the set maximum number.
Setting a “0” disables this timeout function.
Note: Generally, disable retry time-out detection by setting this field to zero.
Some PCI devices invoke more than 128 retries at normal times.
R/W
7:0
TRDYTO
TRDY Timeout
TRDY Time Out (Default: 0x80)
Sets the maximum value of the time to wait for assertion of the TRDY*
signal when operating as the initiator on the PCI Bus.
Setting a “0” disables this timeout function.
Note: Generally, disable TRDY time-out detection by setting this field to
zero. Some PCI devices exhibit a TRDY delay longer than 128 PCI
clocks at normal times.
R/W
Figure 10.4.12 G2P Timeout Count Register



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