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TMP91CW18A Datasheet(PDF) 9 Page - Toshiba Semiconductor |
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TMP91CW18A Datasheet(HTML) 9 Page - Toshiba Semiconductor |
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9 / 278 page ![]() TMP91CW18A 2005-08-15 91CW18A-7 Table 2.2.3 Pin Names and Functions (3/3) Pin Name Number of Pins I/O Functions ALE 1 Output Address latch enable Can be disabled to reduce noise. NMI 1 Input Non-maskable interrupt request pin: Interrupt request pin with programmable falling edge level or with both edge levels programmable AM0 to AM1 2 Input Address mode: The Vcc pin should be connected. EMU0, EMU1 1 Output Test pins: Open pins RESET 1 Input Reset: Initializes TMP91CW18A (with pull-up resistor). VREFH 1 Input Pin for reference voltage input to AD converter (H) VREFL 1 Input Pin for reference voltage input to AD converter (L) AVCC 1 Power supply pin for AD converter AVSS 1 GND pin for AD converter (0 V) X1/X2 2 I/O High-frequency oscillator connection pins DVCC 3 Power supply pins (All Vcc pins should be connected with the power supply pin.) DVSS 2 GND pins (All pins should be connected with GND (0V).) |
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