TMP93CS44 datasheet(114/224 Pages) TOSHIBA

114 / 224 page

TMP93CS44/S45

2004-02-10

93CS44-112

5. Capture input control

This circuit controls the timing to latch the value of up counter UC4 into CAP1,

CAP2. The latch timing of capture register is controlled by register T4MOD<CAP12M

1:0>.

•

When T4MOD<CAP12M1:0>

= 00

Capture function is disabled. Disable is the default on reset.

•

When T4MOD<CAP12M1:0>

= 01

Data is loaded to CAP1 at the rise edge of TI4 pin (also used as P42/INT4) input,

while data is loaded to CAP2 at the rise edge of TI5 pin (also used as P43/INT5)

input.

•

When T4MOD<CAP12M1:0>

= 10

Data is loaded to CAP1 at the rise edge of TI4 pin input, while to CAP2 at the fall

edge. Only in this setting, interrupt INT4 occurs at fall edge.

•

When T4MOD<CAP12M1:0>

= 11

Data is loaded to CAP1 at the rise edge of timer flip-flop TFF1, while to CAP2 at

the fall edge.

Besides, the value of up counter can be loaded to capture registers by software.

Whenever “0” is written in T4MOD<CAP1IN> the current value of up counter will be

loaded to capture register CAP1. It is necessary to keep the prescaler in RUN mode

(TRUN<PRRUN> to be “1”).

6. Comparator

These are 16-bit comparators which compare the up counter UC4 value with the set

value of (TREG4, TREG5) to detect the match. When a match is detected, the

comparators generate an interrupt (INTTR4, INTTR5) respectively. The up counter

UC4 is cleared only when UC4 matches TREG5. (The clearing of up counter UC4 can

be disabled by setting T4MOD<CLE>

= 0.)

7. Timer flip-flop (TFF4)

This flip-flop is inverted by the match detect signal from the comparators and the

latch signals to the capture registers. Disable/enable of inversion can be set for each

element by T4FFCR<CAP2T4, CAP1T4, EQ5T4, EQ4T4>. After reset, the value of

TFF4 is undefined. TFF4 will be inverted when “00” is written in T4FFCR<TFF4C1:0>.

Also it is set to “1” when “01” is written, and set to “0” when “10” is written. The value

of TFF4 can be output to the timer output pin TO4 (also used as P44). Timer output

should be specified by the function register of port 4. (See register for port 4 in Figure

3.5.11.)

TMP93CS44 Datasheet(PDF) 114 Page - Toshiba Semiconductor

TMP93CS44 Datasheet(HTML) 114 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL