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DSPIS Datasheet(PDF) 2 Page - Digital Core Design |
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DSPIS Datasheet(HTML) 2 Page - Digital Core Design |
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2 / 5 page ![]() All trademarks mentioned in this document are trademarks of their respective owners. Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved. ● ○ ○ ○ ○ ○ ○ ○ ● ♦ ◊ ◊ ◊ ♦ ◊ ◊ ◊ ♦ ◊ ◊ ◊ ♦ ♦ ♦ ◊ ◊ http://www.DigitalCoreDesign.com http://www.dcd.pl KEY FEATURES SPI Slave Slave operation Automatic read and write operations Automatic address incrementation after any data portion transfer Configurable address and data length. Configurable SCK phase and polarity. Supports speeds up ¼ of system clock Simple interface allows easy connection to passive devices, and SPI Master Fully synthesizable, static synchronous design with no internal tri-states DELIVERABLES Source code: VHDL Source Code or/and VERILOG Source Code or/and Encrypted, or plain text EDIF netlist VHDL & VERILOG test bench environ- ment Active-HDL automatic simulation macros ModelSim automatic simulation macros Tests with reference responses Technical documentation Installation notes HDL core specification Datasheet Synthesis scripts Example application Technical support IP Core implementation support 3 months maintenance ● Delivery the IP Core updates, minor and major versions changes ● Delivery the documentation updates ● Phone & email support LICENSING Comprehensible and clearly defined licensing methods without royalty fees make using of IP Core easy and simply. Single Design license allows use IP Core in single FPGA bitstream and ASIC implementa- tion. Unlimited Designs, One Year licenses allow use IP Core in unlimited number of FPGA bit- streams and ASIC implementations. In all cases number of IP Core instantiations within a design, and number of manufactured chips are unlimited. There is no time restric- tion except One Year license where time of use is limited to 12 months. ● ○ Single Design license for VHDL, Verilog source code called HDL Source ○ Encrypted, or plain text EDIF called Netlist ● ○ ● ○ ○ ● ○ ○ One Year license for Encrypted Netlist only Unlimited Designs license for HDL Source Netlist Upgrade from HDL Source to Netlist Single Design to Unlimited Designs |
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