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TMP88CS34FG Datasheet(PDF) 32 Page - Toshiba Semiconductor |
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TMP88CS34FG Datasheet(HTML) 32 Page - Toshiba Semiconductor |
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32 / 215 page ![]() TMP88CS34/CP34 2007-09-12 88CS34-32 7 6 5 4 3 2 1 0 EINTCR (00037H) “0” INT0 EN − INT4 ES − INT2 ES “0” − (Initial value: 00*0 *00*) INT0EN P50/ INT0 pin configuration 0: P50 input/output port 1: INT0 pin (Port P50 should be set to an input mode) INT4ES INT2ES INT4 and INT2 edge select 0: Rising edge 1: Falling edge Write only Note 1: fc: High-frequency clock [Hz], *: Don’t care Note 2: Edge detection during switching edge selection is invalid. Note 3: Do not change EINTCR only when IMF = 1. After changing EINTCR, interrupt latches of external interrupt inputs must be cleared to “0” using load instruction. Note 4: In order to change of external interrupt input by rewriting the contents of INT2ES and INT4ES during NORMAL mode, clear interrupt latches of external interrupt inputs (INT2 and INT4) after 8 machine cycles from the time of rewriting. Note 5: In order to change an edge of timer counter input by rewritng the contents of INT2ES during NORMAL mode, rewrite the contents after timer counter is stopped (TC*s = 0) , that is, interrupt disable state. Then, clear a interrupt latch of external interrupt input (INT2) after 8 machine cycles from the time of rewriting to change to interrupt enable state. Finally, start timer counter. Example: When changing TC1 pin inputs edge in external trigger timer mode from rising edge falling edge. LD (TC1CR), 01001000B ; TC1S ← 00 (stops TC1) DI ; IMF ← 0 (disables interrupt service) LD (EINTCR), 00000100B ; INT2ES ← 1 (change edge selection) NOP to NOP LD (ILL), 01111111B ; IL7 ← 0 (clears interrupt latch) EI ; IMF ← 1 (enables interrupt service) LD (TC1CR), 01111000B ; TC1S ← 11 (starts TC1) Figure 1.5.5 External Interrupt Control Register 8-machine cycles |
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