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TC74AC166FN Datasheet(PDF) 6 Page - Toshiba Semiconductor

Part # TC74AC166FN
Description  CMOS Digital Integrated Circuit Silicon Monolithic 8-Bit Shift Register (P-IN, S-OUT)
PDF  10 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC74AC166FN Datasheet(HTML) 6 Page - Toshiba Semiconductor

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TC74AC166P/F/FN
2007-10-01
6
Timing Requirements (input: tr = tf = 3 ns)
Test Condition
Ta
=
25°C
Ta
=
−40 to
85°C
Characteristics
Symbol
VCC (V)
Limit
Limit
Unit
Minimum pulse width
(CK)
tW (H)
tW (L)
⎯
3.3
± 0.3
5.0
± 0.5
7.0
5.0
7.0
5.0
ns
Minimum pulse width
( CLR )
tW (L)
⎯
3.3
± 0.3
5.0
± 0.5
8.0
5.0
8.0
5.0
ns
Minimum set-up time
(SI, PI)
ts
⎯
3.3
± 0.3
5.0
± 0.5
8.0
4.0
8.0
4.0
ns
Minimum set-up time
(
L
S/ )
ts
⎯
3.3
± 0.3
5.0
± 0.5
7.0
4.0
7.0
4.0
ns
Minimum hold time
(SI, PI)
th
⎯
3.3
± 0.3
5.0
± 0.5
0.5
0.5
0.5
0.5
ns
Minimum hold time
(
L
S/ )
th
⎯
3.3
± 0.3
5.0
± 0.5
1.0
1.0
1.0
1.0
ns
Minimum removal time
( CLR )
trem
⎯
3.3
± 0.3
5.0
± 0.5
4.0
1.5
4.0
1.5
ns
AC Characteristics (CL = 50 pF, RL = 500 Ω, input: tr = tf = 3 ns)
Test Condition
Ta
= 25°C
Ta
= −40 to
85°C
Characteristics
Symbol
VCC (V)
Min
Typ.
Max
Min
Max
Unit
Propagation delay
time
(CK-QH)
tpLH
tpHL
⎯
3.3
± 0.3
5.0
± 0.5
⎯
⎯
9.4
6.6
16.1
10.0
1.0
1.0
18.3
11.4
ns
Propagation delay
time
( CLR -QH)
tpHL
⎯
3.3
± 0.3
5.0
± 0.5
⎯
⎯
9.2
6.4
15.2
9.6
1.0
1.0
17.4
10.9
ns
Maximum clock
frequency
fmax
⎯
3.3
± 0.3
5.0
± 0.5
55
90
105
150
⎯
⎯
55
90
⎯
⎯
MHz
Input capacitance
CIN
⎯
⎯
5
10
⎯
10
pF
Power dissipation
capacitance
CPD
(Note)
⎯
⎯
67
⎯
⎯
⎯
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC



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