M29W400DT datasheet(14/48 Pages) STMICROELECTRONICS

14 / 48 page

Signal descriptions

M29W400DT, M29W400DB

14/48

2.7

Write Enable (W)

The Write Enable, W, controls the Bus Write operation of the memory’s command interface.

2.8

Reset/Block Temporary Unprotect (RP)

The Reset/Block Temporary Unprotect pin can be used to apply a hardware reset to the

memory or to temporarily unprotect all blocks that have been protected.

A hardware reset is achieved by holding Reset/Block Temporary Unprotect Low, VIL, for at

least tPLPX. After Reset/Block Temporary Unprotect goes High, VIH, the memory will be

ready for Bus Read and Bus Write operations after tPHEL or tRHEL, whichever occurs last.

See the Ready/Busy output section, Table 15: Reset/Block Temporary Unprotect AC

characteristics and Figure 14: Reset/Block Temporary Unprotect AC waveforms, for more

details.

Holding RP at VID will temporarily unprotect the protected blocks in the memory. Program

and Erase operations on all blocks will be possible. The transition from VIH to VID must be

slower than tPHPHH.

2.9

Ready/Busy output (RB)

The Ready/Busy pin is an open-drain output that can be used to identify when the memory

array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode

and Erase Suspend mode.

After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy

becomes high-impedance. See Table 15: Reset/Block Temporary Unprotect AC

characteristics and Figure 14: Reset/Block Temporary Unprotect AC waveforms.

During Program or Erase operations Ready/Busy is Low, VOL. Ready/Busy will remain Low

during Read/Reset commands or hardware resets until the memory is ready to enter Read

mode.

2.10

Byte/Word Organization Select (BYTE)

The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus

modes of the memory. When Byte/Word Organization Select is Low, VIL, the memory is in 8-

bit mode, when it is High, VIH, the memory is in 16-bit mode.

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