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FS32K112BFT0M Datasheet(PDF) 53 Page - NXP Semiconductors |
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FS32K112BFT0M Datasheet(HTML) 53 Page - NXP Semiconductors |
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53 / 85 page  Table 32. LPSPI electrical specifications1 (continued) Num Symbol Description Conditions Run Mode2 HSRUN Mode2 VLPR Mode Unit 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO 5.0 V IO 3.3 V IO Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. 4 tLag9 Enable lag time (After SPSCK delay) Slave - - - - - - - - - - - - ns Master - - - - - - Master Loopback5 Master Loopback(slow)6 5 tWSPSCK10 Clock(SPSCK ) high or low time (SPSCK duty cycle) Slave ns Master Master Loopback5 Master Loopback(slow)6 6 tSU Data setup time(inputs) Slave 3 - 5 - 3 - 5 - 18 - 18 - ns Master 29 - 38 - 26 - 3711 32 12 - 72 - 78 - Master Loopback5 7 - 8 - 5 - 7 - 20 - 20 - Master Loopback(slow)6 8 - 10 - 7 - 9 - 20 - 20 - 7 tHI Data hold time(inputs) Slave 3 - 3 - 3 - 3 - 14 - 14 - ns Master 0 - 0 - 0 - 0 - 0 - 0 - Master Loopback5 3 - 3 - 2 - 3 - 11 - 11 - Master Loopback(slow)6 3 - 3 - 3 - 3 - 12 - 12 - Table continues on the next page... |
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