CD74HC4017-Q1

HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER

WITH 10 DECODED OUTPUTS

SCLS546SA − OCTOBER 2003 − REVISED APRIL 2008

3

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

VCC

Supply voltage

2

6

V

VCC = 2 V

1.5

VIH

High-level input voltage

VCC = 4.5 V

3.15

V

VIH

High level input voltage

VCC = 6 V

4.2

V

VCC = 2 V

0.5

VIL

Low-level input voltage

VCC = 4.5 V

1.35

V

VIL

Low level input voltage

VCC = 6 V

1.8

V

VI

Input voltage

0

VCC

V

VO

Output voltage

0

VCC

V

VCC = 2 V

0

1000

tt

Input transition (rise and fall) time

VCC = 4.5 V

0

500

ns

tt

Input transition (rise and fall) time

VCC = 6 V

0

400

ns

TA

Operating free-air temperature

−40

125

°C

NOTES:

3. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

IO

V

TA = 25°C

MIN

MAX

UNIT

PARAMETER

TEST CONDITIONS

IO

(mA)

VCC

MIN

MAX

MIN

MAX

UNIT

−0.02

2 V

1.9

1.9

CMOS loads

−0.02

4.5 V

4.4

4.4

VOH

VI = VIH or VIL

CMOS loads

−0.02

6 V

5.9

5.9

V

VOH

VI

VIH or VIL

TTL loads

−4

4.5 V

3.98

3.7

V

TTL loads

−5.2

6 V

5.48

5.2

0.02

2 V

0.1

0.1

CMOS loads

0.02

4.5 V

0.1

0.1

VOL

VI = VIH or VIL

CMOS loads

0.02

6 V

0.1

0.1

V

VOL

VI

VIH or VIL

TTL loads

4

4.5 V

0.26

0.4

V

TTL loads

5.2

6 V

0.26

0.4

II

VI = VCC or GND

6 V

±0.1

±1

µA

ICC

VI = VCC or GND

0

6 V

8

160

µA

CIN

CL = 50 pF

10

10

pF