CDCV304-EP

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SCAS927A – MARCH 2012

SWITCHING CHARACTERISTICS

VDD = 2.5 V ± 10%, CL= 10 pF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

tPLH

Low-to-high propagation delay

2

2.9

4.5

See Figure 1 and Figure 2

ns

tPHL

High-to-low propagation delay

2

3

4.5

tsk(o)

Output skew(2)

See Figure 3

50

150

ps

tr

Output rise slew rate(3)

1

2.2

4

V/ns

tf

Output fall slew rate(3)

1

2.2

4

V/ns

(1)

All typical values are with respect to nominal VDD.

(2)

The tsk(o) specification is only valid for equal loading of all outputs and TA = -40°C to 85°C.

(3)

This symbol is according to PCI-X terminology.

SWITCHING CHARACTERISTICS

VDD = 3.3 V ± 10%, CL= 10 pF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

tPLH

Low-to-high propagation delay

1.8

2.4

3.8

See Figure 1 and Figure 2

ns

tPHL

High-to-low propagation delay

1.8

2.5

3.8

tsk(o)

Output skew(2)

50

100

ps

12 kHz to 5 MHz, fout = 30.72 MHz

63

tjitter

Additive phase jitter from input to output 1Y0

fs rms

12 kHz to 20 MHz, fout = 125 MHz

56

tsk(p)

Pulse skew

VIH = VDD, VIL = 0 V

180

ps

tsk(pr)

Process skew

0.2

ns

tsk(pp)

Part-to-part skew

0.25

ns

66 MHz

6

thigh

Clock high time, see Figure 4

ns

140 MHz

2.2

66 MHz

6

tlow

Clock low time, see Figure 4

ns

140 MHz

3

tr

Output rise slew rate(3)

1

2.7

4

V/ns

tf

Output fall slew rate(3)

1

2.7

4

V/ns

(1)

All typical values are with respect to nominal VDD.

(2)

The tsk(o) specification is only valid for equal loading of all outputs and and TA = -40°C to 85°C.

(3)

This symbol is according to PCI-X terminology.

Copyright © 2012, Texas Instruments Incorporated

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