140

Ω

Yn

VDD

10 pF

140

Ω

0.6 VDD

1Y0 − 1Y3

50% VDD

0.2 VDD

tf

VOL

VOH

tr

CLKIN

0 V

VDD

tPHL

50% VDD

tPLH

0.6 VDD

50% VDD

0.2 VDD

50% VDD

Any Y

Any Y

tsk(0)

50% VDD

thigh

VIH(Min)

Vtest

VIL(Max)

tlow

tcyc

0.4 VDD

Peak to Peak (Minimum)

0.2 VDD

0.6 VDD

PARAMETER

VALUE

UNIT

VIH(Min)

VIL(Max)

Vtest

0.5 VDD

0.35 VDD

0.4 VDD

V

V

V

CDCV304-EP

SCAS927A – MARCH 2012

www.ti.com

PARAMETER MEASUREMENT INFORMATION

Figure 1. Test Load Circuit

Figure 2. Voltage Waveforms Propagation Delay (tpd) Measurements

Figure 3. Output Skew

A.

All parameters in Figure 4 are according to PCI-X 1.0 specifications.

Figure 4. Clock Waveform

6

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