INA163UASLASH2K5 datasheet(7/16 Pages) TI2

7 / 16 page

INA163

SBOS177D

www.ti.com

FIGURE 3. Offset Voltage Adjustment Circuit.

FIGURE 2. Input Stabilization Network.

V+

−

IN+

INA163

Ω

1.2

µH

1.2

µH

INPUT CONSIDERATIONS

Very low source impedance (less than 10

Ω) can cause

the INA163 to oscillate. This depends on circuit layout,

signal source, and input cable characteristics. An input

network consisting of a small inductor and resistor, as

shown in Figure 2, can greatly reduce any tendency to

oscillate. This is especially useful if a variety of input

sources are to be connected to the INA163. Although

not shown in other figures, this network can be used as

needed with all applications shown.

INA163

V+

−

V+

150

Ω

10k

Ω

150

Ω

100

µA

100

µA

−

OPA237

+15V

−15V

±250mA

Output Drive

BUF634 connected

for wide bandwidth.

INA163

BUF634

Sense

FIGURE 4. Buffer for Increase Output Current.

OFFSET VOLTAGE TRIM

A variable voltage applied to pin 10, as shown in

Figure 3, can be used to adjust the output offset voltage.

A voltage applied to pin 10 is summed with the output

signal. An op amp connected as a buffer is used to

provide a low impedance at pin 10 to assure good

common-mode rejection.

OUTPUT SENSE

An output sense terminal allows greater gain accuracy

in driving the load. By connecting the sense connection

at the load, I • R voltage loss to the load is included

inside the feedback loop. Current drive can be in-

creased by connecting a buffer amp inside the feed-

back loop, as shown in Figure 4.

INA163UA/2K5 Datasheet(PDF) 7 Page - Texas Instruments

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