LM48821, LM48821TLEVAL

www.ti.com

SNAS354A – JUNE 2007 – REVISED MAY 2013

After the last bit of the address bit is sent, the master releases the data line high (through a pull-up resistor).

Then the master sends an acknowledge clock pulse. If the LM48821 has received the address correctly, then it

holds the data line low during the clock pulse. If the data line is not held low during the acknowledge clock pulse,

then the master should abort the rest of the data transfer to the LM48821. The 8 bits of data are sent next, most

significant bit first. Each data bit should be valid while the clock level is stable high.

After the data byte is sent, the master must check for another acknowledge to see if the LM48821 received the

data.

If the master has more data bytes to send to the LM48821, then the master can repeat the previous two steps

until all data bytes have been sent.

The stop signal ends the transfer. To signal stop , the data signal goes high while the clock signal is high. The

data line should be held high when not in use.

The LM48821's I2C address is shown in Table 1. The I2C data register and its control bit names are shown in

Table 2. The data values for the volume control are shown in Table 3.

I2C INTERFACE POWER SUPPLY PIN (I2CVDD)

The LM48821’s I2C interface is powered up through the I2CVDD pin. The LM48821’s I

2C interface operates at a

voltage level set by the I2CVDD pin. This voltage can be independent from the main power supply pin (VDD). This

is ideal whenever logic levels for the I2C interface are dictated by a microcontroller or microprocessor that is

operating at a lower supply voltage than the main battery of a portable system.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply

rejection. Applications that employ a 3.3V voltage regulator typically use a 10

μF in parallel with a 0.1μF filter

capacitors to stabilize the regulator’s output, reduce noise on the regulated supply lines, and improve the

regulator’s transient response. However, their presence does not eliminate the need for a local 1.0

μF tantalum

bypass capacitance connected between the LM48821’s supply pins and ground. Keep the length of leads and

traces that connect capacitors between the LM48821’s power supply pins and ground as short as possible.

ELIMINATING THE OUTPUT COUPLING CAPACITOR

The LM48821 features a low noise inverting charge pump that generates an internal negative supply voltage.

This allows the LM48821 to reference its amplifier outputs to ground instead of a half-supply voltage, like

traditional capacitivel-coupled headphone amplifiers. Because there is no DC bias voltage associated with either

stereo output, the large DC blocking capacitors (typically 220

μF) are not necessary. The coupling capacitors are

replaced by two, small ceramic charge pump capacitors, saving board space and cost.

Eliminating the output coupling capacitors also improves low frequency response. In traditional headphone

amplifiers, the headphone impedance and the output capacitor form a high pass filter that not only blocks the DC

component of the output, but also attenuates low frequencies, impacting the bass response. Because the

LM48821 does not require the output coupling capacitors, the low frequency response of the device is not

degraded.

In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the output

voltage swing and available dynamic range of the LM48821 when compared to a traditional capacitively-coupled

output headphone amplifier operating from the same supply voltage.

OUTPUT TRANSIENT ELIMINATED

The LM48821 contains advanced circuitry that virtually eliminates output transients (’clicks' and 'pops’). This

circuitry attenuates output transients when the supply voltage is first applied or when the part resumes operation

after using the shutdown mode.

POWER DISSIPATION

Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to

ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier

operating at a given supply voltage and driving a specified output load.

PDMAX = (2VDD)

2 / (2π2R

L)

(1)

Copyright © 2007–2013, Texas Instruments Incorporated

Submit Documentation Feedback

17

Product Folder Links: LM48821 LM48821TLEVAL