LMK02002

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SNAS418 – AUGUST 2007

Charge Pump Current Specification Definitions (continued)

Charge Pump Sink Current vs. Charge Pump Output Source Current Mismatch

Charge Pump Output Current Magnitude Variation vs. Temperature

Functional Description

The LMK02002 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication,

and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop

(PLL), and four LVPECL clock output distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable

delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted

copies of the reference to be distributed to eight system components.

The clock conditioner comes in a 48-pin WQFN package and is footprint compatible with other clocking devices

in the same family.

BIAS PIN

To properly use the device, bypass Bias (pin 36) with a low leakage 1 µF capacitor connected to Vcc. This is

important for low noise performance.

LDO BYPASS

To properly use the device, bypass LDObyp1 (pin 9) with a 10 µF capacitor and LDObyp2 (pin 10) with a 0.1 µF

capacitor.

OSCILLATOR INPUT PORT (OSCin, OSCin*)

The purpose of OSCin is to provide the PLL with a reference signal. The OSCin port must be AC coupled, refer

to the System Level Diagram in the Application Information section. The OSCin port may be driven single

endedly by AC grounding OSCin* with a 0.1 µF capacitor.

FREQUENCY INPUT PORT (Fin, Fin*)

The purpose of Fin is to provide the PLL with a feedback signal from an external oscillator. The Fin port may be

driven single endedly by AC grounding Fin*.

Copyright © 2007, Texas Instruments Incorporated

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