ESD

R1

IN

+

ESD

D1

D2

R2

ESD

IN

-

ESD

V

+

V

-

V

-

V

+

LMP7721

www.ti.com

SNOSAW6E – JANUARY 2008 – REVISED DECEMBER 2014

Feature Description (continued)

7.3.6 Unique Pinout

The LMP7721 has been designed with the IN+ and IN

−, V+ and V− pins on opposite sides of the package. There

are isolation pins between IN+ and V−, IN

− and V+. This unique pinout makes it easy to guard the LMP7721’s

input. This pinout design reduces the input bias current’s dependence on common mode or supply bias.

The SOIC package features low leakage and it has large pin spacing. This lowers the probability of dust particles

settling down between two pins thus reducing the resistance between the pins which can be a problem.

The two No Connect (N/C) isolation pins are not internally connected and may be tied to the guard trace to

provide down-into-the-package level guarding of the inputs.

7.3.7 Input Protection

The LMP7721 input stage is protected from seeing excessive differential input voltage by a pair of back-to-back

diodes attached between the inputs. This limits the differential voltage and hence prevents phase inversion as

well as any performance drift. These diodes can conduct current when the input signal has a really fast edge,

and, if necessary, should be isolated (using a resistor or a current follower) in such cases. Under normal

feedback operation, the average differential voltage is less than 1 mV and these diodes do not affect the normal

operation of the device. This clamp also limits the use as a comparator, which is not a recommended function for

operational amplifiers.

Figure 44. Input Protection Diodes

7.4 Device Functional Modes

7.4.1 Compensating Input Capacitance

The high-input resistance of the LMP7721 allows the use of large feedback and source resistor values without

losing gain accuracy due to loading. However, the circuit will be especially sensitive to its layout when these

large-value resistors are used.

Figure 45. General Operational Amplifier Circuit

Every amplifier has some capacitance between each input and AC ground, and also some differential

capacitance between the inputs. When the feedback network around an amplifier is resistive, this input

capacitance (along with any additional capacitance due to circuit board traces, the socket, etc.) and the feedback

resistors create a pole in the feedback path. This pole can cause gain "peaking" or outright oscillations.

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