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74V1G00S Datasheet(PDF) 1 Page - STMicroelectronics |
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74V1G00S Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 7 page 74V1G00 SINGLE 2-INPUT NAND GATE ® October 1999 s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1 µA (MAX.) at TA =25 oC s HIGH NOISE IMMUNITY: VNIH =VNIL =28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1G00 is an advanced high-speed CMOS SINGLE 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODE: 74V1G00S 74V1G00C S (SOT23-5L) C (SC-70) 1/7 |
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