SN74HC595-EP

SCLS719 – FEBRUARY 2010

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TIMING REQUIREMENTS

over operating free-air temperature range (unless otherwise noted)

TA = 25°C

TA = –55°C to 125°C

VCC

UNIT

MIN

MAX

MIN

MAX

2 V

6

4.2

fclock

Clock frequency

4.5 V

31

21

MHz

6 V

36

25

2 V

80

120

SRCLK or RCLK high or low

4.5 V

16

24

6 V

14

20

tw

Pulse duration

ns

2 V

80

120

SRCLR low

4.5 V

16

24

6 V

14

20

2 V

100

150

SER before SRCLK

↑

4.5 V

20

30

6 V

17

25

2 V

75

113

SRCLK

↑ before RCLK↑(1)

4.5 V

15

23

6 V

13

19

tsu

Setup time

ns

2 V

50

75

SRCLR low before RCLK

↑

4.5 V

10

15

6 V

9

13

2 V

50

75

SRCLR high (inactive) before SRCLK

↑

4.5 V

10

15

6 V

9

13

2 V

0

0

th

Hold time, SER after SRCLK

↑

4.5 V

0

0

ns

6 V

0

0

(1)

This setup time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case

the shift register is one clock pulse ahead of the storage register.

6

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