TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B

TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y

LinCMOS

 QUAD OPERATIONAL AMPLIFIERS

SLOS003G – JUNE 1983 – REVISED MARCH 2001

20

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

latch-up avoidance

Junction-isolated CMOS circuits have an inherent parasitic PNPN structure that can function as an SCR. Under

certain conditions, this SCR may be triggered into a low-impedance state, resulting in excessive supply current.

To avoid such conditions, no voltage greater than 0.3 V beyond the supply rails should be applied to any pin.

In general, the operational amplifiers supplies should be established simultaneously with, or before, application

of any input signals.

output stage considerations

The amplifier’s output stage consists of a source-follower-connected pullup transistor and an open-drain

pulldown transistor. The high-level output voltage (VOH) is virtually independent of the IDD selection and

increases with higher values of VDD and reduced output loading. The low-level output voltage (VOL) decreases

with reduced output current and higher input common-mode voltage. With no load, VOL is essentially equal to

the potential of VDD–/GND.

supply configurations

Even though the TLC25_4C series is are characterized for single-supply operation, they can be used effectively

in a split-supply configuration if the input common-mode voltage (VICR), output swing (VOL and VOH), and supply

voltage limits are not exceeded.

circuit layout precautions

Whenever extremely high circuit impedances are used, care must be exercised in layout, construction, board

cleanliness, and supply filtering to avoid hum and noise pickup as well as excessive dc leakages.