IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
25/93
June 21, 2007
Copyright © 2004, IC Plus Corp.
IP178Cx-DS-R12
Pin description (continued)
Pin no.
Label
Type
Description
MII interface/ PHY mode
(Pin 53 EXTMII_EN =1, pin104 MII_MAC=0 and Pin72 RMII_MII =0)
101
MIICLK
IPL2/
O
MII transmit & receive clock
It is an output signal when MII works at PHY mode. It should be
connected to MII TXCLK & RXCLK of an external MAC device.
87,86,85
,81
TXD0~TXD3
IPL1
IPL1
IPL1
IPH2
MII transmit data
They are input signals when MII works at PHY mode. They are
sampled at the rising edge of MIICLK. They should be
connected to MII TXD of an external MAC device.
80
TXEN
IPH2
MII transmit enable
It is an input signal when MII works at PHY mode. It is used to
frame TXD [3:0]. It is sampled at the rising edge of MIICLK. It
should be connected to MII TXEN of an external MAC device.
75
RXDV
IPH1/
O
MII receive data valid
It is an output signal when MII works at PHY mode. It is used to
frame RXD [3:0]. It is sent out at the falling edge of MIICLK. It
should be connected to MII RXDV of an external MAC device.
79, 78,
77, 76
RXD0~RXD4
IPL1/
O,
IPL1/
O,
IPL1/
O,
IPH1/
O
MII receive data
They are output signals when MII works at PHY mode. They are
sent out at the falling edge of MIICLK. They should be
connected to MII RXD of an external MAC device.
56
NC
IPH2
This pin should be left open
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