ZL40268 datasheet(36/56 Pages) MICROCHIP

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ZL40268

DS20006412C-page 36

 2020-2021 Microchip Technology Inc.

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TABLE 4-12:

HCSL OUTPUTS (PCIE ELECTRICAL CHARACTERISTICS)

FOR VDDO = 3.3V AND 2.5V

Note 1

Parameter

Symbol

Min

Typ.

Max

Units

Condition

Rising edge rate

Rise Rate

1.4

1.75

V/ns

Note 3, Note 4

Falling edge rate

Fall Rate

1.4

1.75

V/ns

Note 3, Note 4

Differential high voltage

VIH

0.6

Note 3

Differential low voltage

VIL

—

–0.6

Note 3

Single-ended high voltage

VSIH

0.65

0.75

0.85

DC measurement

Single-ended low voltage

VSIL

–20

DC measurement

Absolute crossing voltage

VCROSS

0.25

0.55

Note 2, Note 5,

Note 6

Variation of VCROSS over all rising

clock edges

VCROSS

—0.140

Note 2, Note 5,

Note 9

Ring back voltage margin

VRB

–0.55

0.55

Note 3, Note 10

Time before VRB is allowed

tSTABLE

4.6

Note 3, Note 10

Cycle-to-cycle additive jitter

tJCC

—4.6

5.8

peak to peak

Note 3

Absolute Maximum voltage

VMAX

—1.15

—

Note 2, Note 7

Absolute Minimum voltage

VMIN

–0.3

—

Note 2, Note 8

Output Duty Cycle (when input has

50% duty cycle)

Duty Cycle

Note 3

Rising to falling edge matching

r/f match

—

Note 2, Note 11

Clock Source DC impedance (CK)

ZC-DC_CK

—50

DC measurement

Clock Source DC impedance (CK#)

ZC-DC_CK#

—50

DC measurement

Output frequency

FMAX

400

MHz

—

Output to output skew

tOOSK

—50

—

Device to device output skew

tDOOSK

—

129

—

Input to output delay

tIOD

0.8

1.2

—

Output enable time

tEN

—

cycles

—

Output disable time

tDIS

—

cycles

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