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TSB41AB3MPFPEP Datasheet(PDF) 33 Page - Texas Instruments |
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TSB41AB3MPFPEP Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 56 page  TSB41AB3EP IEEE 1394a2000 THREEPORT CABLE TRANSCEIVER/ARBITER SGLS122C − JULY 2002 − REVISED JUNE 2008 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION output differentiation (continued) 01 1 0 0 0 0 10 LH Z 0 Z Z L HZ Logic State Signal Level Figure 15. Signal Transformation for Digital Differentiation The TSB41AB3 implements differentiation circuitry functionally equivalent to that shown in Figure 15 on the bidirectional CTL0–CTL1and D0–D7 terminals. The TSB41AB3 also implements an input hysteresis buffer on the LREQ input to convert this signal to the correct logic level when differentiated. The LLC must also implement similar output differentiation and input hysteresis circuitry on its CTL and D terminals, and output differentiation circuitry on its LREQ terminal. DIn To/From Internal Device Logic DOut ISO OutEn Init SysClk D Q D Q D Q D 3-State Output Driver Input Buffer With Hysteresis Figure 16. Input/Output Differentiation Logic |
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