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LM4990MH/NOPB Datasheet(PDF) 4 Page - Texas Instruments |
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LM4990MH/NOPB Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 30 page ![]() LM4990 SNAS184E – DECEMBER 2002 – REVISED MAY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage(3) 6.0V Storage Temperature −65°C to +150°C Input Voltage −0.3V to VDD +0.3V Power Dissipation(4)(5) Internally Limited ESD Susceptibility(6) 2000V ESD Susceptibility(7) 200V Junction Temperature 150°C θJC (VSSOP) 56°C/W θJA (VSSOP) 190°C/W Thermal Resistance θJA (9 Bump DSBGA) (8) 180°C/W θJA (WSON) 63°C/W(9) θJC (WSON) 12°C/W(9) Soldering Information: See the AN-1187 Application Report (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional but specific performance is not ensured. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. (2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) If the product is in Shutdown mode and VDD exceeds 6V (to a max of 8V VDD), then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when VDD is greater than 5.5V and less than 6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage. (4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4990, see power derating curves for additional information. (5) Maximum power dissipation in the device (PDMAX) occurs at an output power level significantly below full output power. PDMAX can be calculated using Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs. (6) Human body model, 100pF discharged through a 1.5k Ω resistor. (7) Machine Model, 220pF – 240pF discharged through all pins. (8) All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. All bumps must be connected to achieve specified thermal resistance. (9) The Exposed-DAP of the NGZ0010B package should be electrically connected to GND or an electrically isolated copper area. the LM4990LD demo board has the Exposed-DAP connected to GND with a PCB area of 86.7mils x 585mils (2.02mm x 14.86mm) on the copper top layer and 550mils x 710mils (13.97mm x 18.03mm) on the copper bottom layer. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ 85°C Supply Voltage 2.2V ≤ VDD ≤ 5.5V 4 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: LM4990 |
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