ESR(min) =

34.5 mA

50 mV

= 1.45:

IOR(min) =

L1max x FS(max) x VIN(min)

VOUT x (VIN(min) - VOUT)

120 PH x 201 kHz x 6V

5V x (6V - 5V)

= 34.5 mAp-p

=

C1 =

'V

IO x tON

= 13 PF

0.5V

1.0A x 6.5 Ps

=

tON(max) =

6V - 1.4V

1.18 x 10

-10

x (200k + 1.4k)

+ 67 ns x 1.25 = 6.5 Ps

17

LM5010A, LM5010A-Q1

www.ti.com

SNVS376F – OCTOBER 2005 – REVISED MAY 2016

Product Folder Links: LM5010A LM5010A-Q1

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8.2.2.1.5

C1

This capacitor limits the ripple voltage at VIN resulting from the source impedance of the supply feeding this

circuit, and the on and off nature of the switch current into VIN. At maximum load current, when the buck switch

turns on, the current into VIN steps up from zero to the lower peak of the inductor current waveform (IPK- in

Figure 12), ramps up to the peak value (IPK+), then drops to zero at turnoff. The average current into VIN during

this ON-time is the load current. For a worst case calculation, C1 must supply this average current during the

maximum ON-time. The maximum ON-time is calculated at VIN = 6 V using Equation 5, with a 25% tolerance

added in Equation 17.

(17)

The voltage at VIN should not be allowed to drop below 5.5 V in order to maintain VCC above its UVLO as in

Equation 18.

(18)

Normally a lower value can be used for C1 since the above calculation is a worst case calculation which

assumes the power source has a high source impedance. A quality ceramic capacitor with a low ESR should be

used for C1.

8.2.2.1.6

C2 and R3

Since the LM5010Ax requires a minimum of 25 mVp-p of ripple at the FB pin for proper operation, the required

ripple at VOUT is increased by R1 and R2, and is equal to Equation 19.

VRIPPLE = 25 mVp-p x (R1 + R2) / R2 = 50 mVp-p

(19)

This necessary ripple voltage is created by the inductor ripple current acting on C2’s ESR + R3. First, the

minimum ripple current is determined which occurs at minimum VIN, maximum inductor value, and calculate the

maximum frequency with Equation 20.

(20)

The minimum ESR for C2 is then equal to Equation 21.

(21)

If the capacitor used for C2 does not have sufficient ESR, R3 is added in series as shown in the Block Diagram.

The value chosen for C2 is application dependent, and it is recommended that it be no smaller than 3.3 µF. C2

affects the ripple at VOUT, and transient response. Experimentation is usually necessary to determine the

optimum value for C2.

8.2.2.1.7

C3

The capacitor at the VCC pin provides noise filtering and stability, prevents false triggering of the VCC UVLO at

the buck switch ON and OFF transitions, and limits the peak voltage at VCC when a high voltage with a short rise

time is initially applied at VIN. C3 should be no smaller than 0.47 µF, and must be a good quality, low ESR,

ceramic capacitor, physically close to the IC pins.

8.2.2.1.8

C4

The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended as

C4 supplies the surge current to charge the buck switch gate at each turnon. A low ESR also ensures a

complete recharge during each OFF-time.