'I =

(VIN - VOUT) x tON

L1

tON(min) =

VOUT x 300 ns

(VIN(min) ± VOUT)

12

LM5010A, LM5010A-Q1

SNVS376F – OCTOBER 2005 – REVISED MAY 2016

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Copyright © 2005–2016, Texas Instruments Incorporated

Feature Description (continued)

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7.3.6 Soft Start

The soft start feature allows the regulator to gradually reach a steady-state operating point, thereby reducing

start-up stresses and current surges. At turnon, while VCC is below the undervoltage threshold (t1 in Figure 1),

the SS pin is internally grounded, and VOUT is held at 0 V. When VCC exceeds the undervoltage threshold

(UVLO) an internal 11.5-µA current source charges the external capacitor (C6) at the SS pin to 2.5 V (t2 in

Figure 1). The increasing SS voltage at the non-inverting input of the regulation comparator gradually increases

the output voltage from zero to the desired value. The softstart feature keeps the load inductor current from

reaching the current limit threshold during start-up, thereby reducing inrush currents.

An internal switch grounds the SS pin if VCC is below the undervoltage lockout threshold, or if the circuit is

shutdown using the RON/SD pin.

7.3.7 N-Channel Buck Switch and Driver

The LM5010Ax integrates an N-Channel buck switch and associated floating high voltage gate driver. The peak

current through the buck switch should not exceed 2 A, and the load current should not exceed 1.5 A. The gate

driver circuit is powered by the external bootstrap capacitor between BST and SW (C4), which is recharged each

OFF-time from VCC through the internal high voltage diode. The minimum OFF-time, nominally 260 ns, ensures

sufficient time during each cycle to recharge the bootstrap capacitor. A 0.022-µF ceramic capacitor is

recommended for C4.

7.3.8 Current Limit

Current limit detection occurs during the OFF-time by monitoring the recirculating current through the internal

current sense resistor (RSENSE). The detection threshold is 1.25 A, ±0.25 A. Referring to Functional Block

Diagram, if the current into SGND during the OFF-time exceeds the threshold level the current limit comparator

delays the start of the next ON-time period. The next ON-time starts when the current into SGND is below the

threshold and the voltage at FB is below 2.5 V. Figure 9 illustrates the inductor current waveform during normal

operation and during current limit. The output current IO is the average of the inductor ripple current waveform.

The low load current waveform illustrates continuous conduction mode operation with peak and valley inductor

currents below the current limit threshold. When the load current is increased (high load current), the ripple

waveform maintains the same amplitude and frequency since the current falls below the current limit threshold at

the valley of the ripple waveform. Note the average current in the high load current portion of Figure 9 is above

the current limit threshold. Since the current reduces below the threshold in the normal OFF-time each cycle, the

start of each ON-time is not delayed, and the circuit’s output voltage is regulated at the correct value. When the

load current is further increased such that the lower peak would be above the threshold, the OFF-time is

lengthened to allow the current to decrease to the threshold before the next ON-time begins (Current Limited

portion of Figure 9). Both VOUT and the switching frequency are reduced as the circuit operates in a constant

current mode. The load current (IOCL) is equal to the current limit threshold plus half the ripple current (ΔI/2). The

ripple amplitude (

ΔI) is calculated with Equation 9.

(9)

The current limit threshold can be increased by connecting an external resistor (RCL) between SGND and ISEN.

RCL typically is less than 1 Ω, and the calculation of its value is explained in Application and Implementation. If

the current limit threshold is increased by adding RCL, the maximum continuous load current should not exceed

1.5 A, and the peak current out of the SW pin should not exceed 2 A.