R1 =

UVLOon - UVLOoff

23 PA

OVPoff = 1.25V x

R1 + R2 + R3

R3

¨

¨

©

§

UVLOoff = 1.25V x

R1 + R2 + R3

R2 + R3

¨

¨

©

§

UVLO

LM5035B

Disable Output Drivers

Disable VCC and REF Regulators

OVP

STANDBY

R2

R1

R3

5V

1.25V

0.4V

1.25V

23 PA

23 PA

VPWR

LM5035B

www.ti.com

SNVS613C – JULY 2009 – REVISED APRIL 2013

Figure 24. UVLO/OVP Divider

The impedance seen looking into the resistor divider from the UVLO and OVP pins determines the hysteresis

level. UVLO and OVP enable and disable thresholds are calculated using the equations in the table below for the

three-resistor divider illustrated in Figure 24.

Table 1. UVO/OVP Divider Formulas

Outputs disabled due to VIN falling below UVLO threshold

Outputs enabled due to VIN rising above UVLO threshold

UVLOon = UVLOoff + (23 µA x R1)

Outputs disabled due to VIN rising above OVP threshold

Outputs enabled due to VIN falling below OVP threshold

OVPon = OVPoff - [23 µA x (R1 + R2)]

The typical operating ranges of undervoltage and overvoltage thresholds are calculated from the above

equations. For example, for resistor values R1 = 86.6k

Ω, R2 = 2.10kΩ and R3 = 1.40kΩ the computed

thresholds are:

UVLO turn-off = 32.2V

UVLO turn-on = 34.2V

OVP turn-on = 78.4V

OVP turn-off = 80.5V

To maintain the threshold’s accuracy, a resistor tolerance of 1% or better is recommended.

The design process starts with the choice of the voltage difference between the UVLO enabling and disabling

thresholds. This will also approximately set the difference between OVP enabling and disabling regulation:

(11)

Next, the combined resistance of R2 and R3 is calculated by choosing the threshold for the UVLO disabling

threshold:

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