LP5562 datasheet(22/52 Pages) TI2

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LP5562

SNVS820B – APRIL 2013 – REVISED DECEMBER 2016

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7.3.5 External Clock

The presence of an external clock can be detected by the LP5562. Program execution is clocked with an internal

32-kHz clock or with an external clock. Clocking is controlled with register address 08h bits, INT_CLK_EN, and

CLK_DET_EN as seen in Table 22.

An external clock can be used if clock is present at the CLK_32K pin. The external clock frequency must be 32

kHz for the program execution PWM timing to be as specified. If higher or lower frequency is used, it will affect

the program engine execution speed. If a clock frequency other than 32 kHz is used, the program execution

timings must be scaled accordingly.

The LP5562 has automatic external clock detection. The external clock detector block only detects too low clock

frequency (< 4 kHz), but it is recommended not to use external clock below 20 kHz. If external clock frequency is

higher than specified, the external clock detector notifies that external clock is present. External clock status can

be checked with read only bit EXT_CLK_USED in register address 0Ch, when the external clock detection is

enabled (CLK_DET_EN bit = high). If EXT_CLK_USED = 1, then the external clock is detected and it is used for

timing, if automatic clock selection is enabled.

If an external clock is stuck-at-zero or stuck-at-one, or the clock frequency is too low, the clock detector indicates

that external clock is not present.

If an external clock is not used on the application, CLK_32K pin should be connected to GND to prevent floating

of this pin and extra current consumption.

Table 22. CONFIG Register (08h)

NAME

BIT

DESCRIPTION

CLK_DET_EN,

INT_CLK_EN

1:0

LED Controller clock source

00b = External clock source (CLK_32K)

01b = Internal clock

10b = Automatic selection

11b = Internal clock

7.3.6 Thermal Shutdown

If the LP5562 reaches thermal shutdown temperature (150°C typical) the device operation is disabled and the

device state is in STARTUP mode, until no thermal shutdown event is present. Device will enter Normal mode

when temperature drops below 130°C (typical) degrees.

Fault is cleared when thermal shutdown disappears.

7.3.7 Logic Interface Operational Description

The LP5562 features a flexible logic interface for connecting to processor and peripheral devices.

Communication is done with the I2C-compatible interface, and different logic input/output pins makes it possible

to synchronize operation of several devices.

7.3.8 I/O Levels

I2C interface, CLK_32K. ADDR_SEL0, and ADDR_SEL1 pins input levels are defined by voltage in EN pin. Using

the EN pin as a voltage reference for logic inputs simplifies PCB routing and eliminates the need for a dedicated

VIO pin. The following block diagram describes EN pin connections.

LP5562 Datasheet(PDF) 22 Page - Texas Instruments

LP5562 Datasheet(HTML) 22 Page - Texas Instruments

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