= 1

EXCLUSIVE OR

Copyright © 2017, Texas Instruments Incorporated

Product

Folder

Order

Now

Technical

Documents

Tools &

Software

Support &

Community

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74LVC1G86

SCES222Q – APRIL 1999 – REVISED JUNE 2017

SN74LVC1G86 Single 2-Input Exclusive-OR Gate

1

1 Features

1

•

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

–

1000-V Charged-Device Model (C101)

•

Qualified from –40°C to +125°C

•

Supports 5-V VCC Operation

•

Inputs Are Over Voltage Tolerant up to 5.5 V

•

Supports Down Translation to VCC

•

Maximum tpd of 4 ns at 3.3 V and 15-pF load

•

Low Power Consumption, 10-µA Maximum ICC At

85°C

•

±24-mA Output Drive at 3.3 V

•

Ioff Supports Partial-Power-Down Mode, and Back-

Drive Protection

•

Available in the Texas Instruments

NanoFree™ Package

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

2 Applications

•

Wireless Headsets

•

Motor Drives and Controls

•

TVs

•

Set-Top Boxes

•

Audio

3 Description

The SN74LVC1G86 device performs the Boolean

function Y = AB + AB in positive logic. This single 2-

input exclusive-OR gate is designed for 1.65-V to 5.5-

V VCC operation.

If the input is low, the other input is reproduced in

true form at the output. If the input is high, the signal

on the other input is reproduced inverted at the

output. This device has low power consumption with

maximum tpd of 4 ns at 3.3 V and 15-pF capacitive

load. The maximum output drive is ±32-mA at 4.5 V

and ±24-mA at 3.3 V.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current back flow

through the device when it is powered down.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

SN74LVC1G86DBV

SOT-23 (5)

2.90 mm × 1.60 mm

SN74LVC1G86DCK

SC70 (5)

2.00 mm × 1.25 mm

SN74LVC1G86DRL

SOT (5)

1.60 mm × 1.20 mm

SN74LVC1G86YZP

DSBGA (5)

1.44 mm × 0.94 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Functional Block Diagram

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.

These are five equivalent exclusive-OR symbols valid for an SN74LVC1G86 gate in positive logic; negation may be

shown at any two ports.