A1

A0

1

1

1

Fixed

Hardware

selectable

0

0

R/W

SDA

Slave Address

ControlRegister

Stop

Condition

R/W

Start

Condition

No Acknowledge

FromMaster

Acknowledge

FromSlave

LastByte

A1

S

A0

1

1

1

0

0

1

A

NA

P

X

X

INT1 INT0

X

X

B1

B0

SDA

Slave Address

ControlRegister

Stop

Condition

R/W

Start

Condition

Acknowledge

FromSlave

Acknowledge

FromSlave

A1

S

A0

1

1

1

0

0

0

A

A

P

X

X

X

X

X

X

B1

B0

14

TCA9543A

SCPS206B – MARCH 2014 – REVISED NOVEMBER 2019

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Copyright © 2014–2019, Texas Instruments Incorporated

Programming (continued)

Figure 12. Write Control Register

Data is read from the TCA9543A control register using the read mode shown in Figure 13.

Figure 13. Read Control Register

8.6 Register Maps

8.6.1 Device Address

Following a start condition, the bus master must output the address of the slave it is accessing. The address of

the TCA9543A is shown in Figure 14. To conserve power, no internal pullup resistors are incorporated on the

hardware-selectable address terminals and they must be pulled high or low.

Figure 14. Slave Address TCA9543A

The last bit of the slave address defines the operation to be performed. When set to a logic 1, a read is selected,

while a logic 0 selects a write operation.

8.6.2 Control Register Description

Following the successful acknowledgment of the slave address, the bus master sends a byte to the TCA9543A,

which is stored in the control register (see Figure 15). If multiple bytes are received by the TCA9543A, it saves

the last byte received. This register can be written and read via the I2C bus.