tPHZ

tPLZ

tPZL

tPZH

3 V

0 V

Output

Control

(low-level

enabling)

Waveform 1

Waveform 2

≈1.5 V

VOH – 0.5 V

VOL + 0.5 V

≈1.5 V

1.3 V

1.3 V

1.3 V

1.3 V

VOL

VOH

12

SN5414, SN54LS14, SN7414, SN74LS14

SDLS049C – DECEMBER 1983 – REVISED NOVEMBER 2016

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Product Folder Links: SN5414 SN54LS14 SN7414 SN74LS14

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Copyright © 1983–2016, Texas Instruments Incorporated

Series SN54LS14 and SN74LS14 Devices (continued)

A.

CL includes probe and jig capacitance.

B.

All diodes are 1N3064 or equivalent.

C.

Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output

control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the

output control.

D.

S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open

for tPZL.

E.

Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.

F.

All input pulses are supplied by generators having the following characteristics: PRR

≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns,

tf ≤ 2.6 ns.

G.

The outputs are measured one at a time with one input transition per measurement.

Figure 27. Voltage Waveforms Enable and Disable Times, 3-State Outputs