STM32L4S5AIY3 datasheet(25/275 Pages) STMICROELECTRONICS

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STM32L4S5xx, STM32L4S7xx and STM32L4S9xx

Functional overview

In addition, the devices embed a peripheral voltage monitor which compares the

independent supply voltages VDDA, VDDUSB, VDDIO2 with a fixed threshold in order to ensure

that the peripheral is in its functional supply range.

3.10.3

Voltage regulator

Two embedded linear voltage regulators supply most of the digital circuitries: the main

regulator (MR) and the low-power regulator (LPR).

•

The MR is used in the Run and Sleep modes and in the Stop 0 mode.

•

The LPR is used in Low-power run, Low-power sleep, Stop 1 and Stop 2 modes. It is

also used to supply the 64 Kbytes SRAM2 in standby with RAM2 retention.

•

Both regulators are in power-down while they are in standby and Shutdown modes: the

regulator output is in high impedance, and the kernel circuitry is powered down thus

inducing zero consumption.

The ultra-low-power STM32L4Sxxx devices support dynamic voltage scaling to optimize its

power consumption in Run mode. The voltage from the main regulator that supplies the

logic (VCORE) can be adjusted according to the system’s maximum operating frequency.

The main regulator operates in the following ranges:

•

Range 1 boost mode with the CPU running at up to 120 MHz.

•

Range 1 normal mode with the CPU running at up to 80 MHz.

•

Range 2 with a maximum CPU frequency of 26 MHz. All peripheral clocks are also

limited to 26 MHz.

The VCORE can be supplied by the low-power regulator, the main regulator being switched

off. The system is then in Low-power run mode.

•

Low-power run mode with the CPU running at up to 2 MHz. Peripherals with

independent clock can be clocked by the HSI16.

Note:

The USB and DSIHOST can only be used when the main regulator is in range1 boost mode.

STM32L4S5AIY3 Datasheet(PDF) 25 Page - STMicroelectronics