DRV8802

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SLVSAM9D – APRIL 2011 – REVISED DECEMBER 2015

Figure 6. Decay Mode

The DRV8802 supports fast decay and slow decay mode. Slow or fast decay mode is selected by the state of

the DECAY pin - logic low selects slow decay, and logic high sets fast decay mode. Note that the DECAY pin

sets the decay mode for both H-bridges.

DECAY mode also affects the operation of the bridge when it is disabled (by taking the ENBL pin inactive). This

applies if the ENABLE input is being used for PWM speed control of the motor, or if it is simply being used to

start and stop motor rotation.

If the DECAY pin is high (fast decay), when the bridge is disabled, all FETs are turned off and decay current

flows through the body diodes. This allows the motor to coast to a stop.

If the DECAY pin is low (slow decay), both low-side FETs is turned on when ENBL is made inactive. This

essentially shorts out the back EMF of the motor, causing the motor to brake, and stop quickly. The low-side

FETs stays in the ON state even after the current reaches zero.

7.4.4 Blanking Time

After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time

before enabling the current sense circuitry. This blanking time is fixed at 3.75

μs. Note that the blanking time also

sets the minimum on time of the PWM.

7.4.5 nRESET and nSLEEP Operation

The nRESET pin, when driven active low, resets the internal logic. It also disables the H-bridge drivers. All inputs

are ignored while nRESET is active.

Driving nSLEEP low puts the device into a low-power sleep state. In this state, the H-bridges are disabled, the

gate drive charge pump is stopped, the V3P3OUT regulator is disabled, and all internal clocks are stopped. In

this state all inputs are ignored until nSLEEP returns inactive high. When returning from sleep mode, some time

(approximately 1 ms) needs to pass before the motor driver becomes fully operational.

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