ISO7520CDWR datasheet(12/28 Pages) TI2

12 / 28 page

ISO7520C, ISO7521C

SLLSE39E – JUNE 2010 – REVISED MAY 2015

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8.3 Feature Description

8.3.1 Insulation Characteristics

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

SPECIFICATION

UNIT

Maximum repetitive peak isolation

VIORM

1414

VPEAK

voltage

Method a, After environmental tests subgroup 1,

VPR = VIORM x 1.6, t = 10 s,

2262

Partial discharge < 5 pC

Method b1,

VPR

Input to output test voltage

VPR = VIORM x 1.875, t = 1 s (100% Production test)

2651

VPEAK

Partial discharge < 5 pC

After Input/Output Safety Test Subgroup 2/3,

VPR = VIORM x 1.2, t = 10 s,

1697

Partial discharge < 5 pC

VIOTM

Maximum Transient Isolation voltage

t = 60 sec (qualification)

6000

VPEAK

VTEST = VISO = 4243 VRMS, t = 60 sec (qualification);

Withstanding Isolation voltage per UL

VISO

VTEST = 1.2 × VISO = 5092 VRMS, t = 1 sec (100%

4243

VRMS

1577

production)

Isolation resistance

VIO = 500 V at TS = 150°C

>109

Pollution degree

8.3.2 IEC 60664-1 Ratings Table

PARAMETER

TEST CONDITIONS

SPECIFICATION

Basic Isolation Group

Material Group

Rated mains voltages <= 150 Vrms

I - IV

Installation Classification

Rated mains voltages <= 600 Vrms

I - III

Rated mains voltages <= 1000 Vrms

I - II

8.3.3 Package Insulation and Safety-Related Specifications

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

L(I01)

Minimum air gap (Clearance)

Shortest terminal-to-terminal distance through air

8.34

Shortest terminal-to-terminal distance across the

L(I02)

Minimum external tracking (Creepage)

8.1

package surface

Tracking resistance (Comparative Tracking

CTI

DIN EN 60112 (VDE 0303-11); IEC 60112

>400

Index)

Minimum internal gap (Internal Clearance)

Distance through the insulation

0.014

VIO = 500 V, TA = 25ºC

>1012

RIO

Isolation resistance, input to output(1)

VIO = 500 V, 100ºC ≤ TA ≤ TA max

>1011

CIO

Barrier capacitance input to output(1)

VIO = 0.4 sin(2πft), f = 1 MHz

Input capacitance to ground(2)

VI = VCC/2 + 0.4 sin(2πft), f = 1 MHz, VCC = 5 V

(1)

All pins on each side of the barrier tied together creating a 2-terminal device.

(2)

Measured from input pin to ground.

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