LM5035CMHSLASHNOPB datasheet(21/43 Pages) TI2

21 / 43 page

LM5035C

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SNVS631D – JANUARY 2010 – REVISED OCTOBER 2016

Product Folder Links: LM5035C

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The LM5035C is a high performance PWM controller integrated half-bridge and synchronous rectifier driver and

is ideally suited for half-bridge topology power converters. The LM5035C architecture allows voltage mode

control with line voltage feedforward. Cycle-by-cycle current limit protection can be implemented. The hiccup

timer helps the system to stay within a safe operation range under overcurrent conditions. The LM5035C allows

programming of dead time between the SR1 and SR2 signals and the HO and LO driver outputs, to allow optimal

power stage design. The LM5035C also provides complete system level protection functions, including UVLO,

OVP, overcurrent protection.

9.2 Typical Application

The following schematic shows an example of a 100-W half-bridge power converter controlled by the LM5035C.

The operating input voltage range (VPWR) is 36 V to 75 V, and the output voltage is 3.3 V. The output current

capability is 30 A. Current sense transformer T2 provides information to the CS pin for current limit protection.

The error amplifier and reference, U3 and U5 respectively, provide voltage feedback through opto-coupler U4.

Synchronous rectifiers Q4, Q5, Q6, and Q7 minimize rectification losses in the secondary. An auxiliary winding

on transformer T1 provides power to the LM5035C VCC pin when the output is in regulation. The input voltage

UVLO thresholds are

≊34 V for increasing VPWR, and ≊32 V for decreasing VPWR. The circuit can be shut down

by driving the ON/OFF input (J2) below 1.25 V with an open-collector or open-drain circuit. An external

synchronizing frequency can be applied through a 100-pF capacitor to the RT input (U1 pin 5). The regulator

output is current-limited at

≊34 A.

LM5035CMH/NOPB Datasheet(PDF) 21 Page - Texas Instruments