LMP7718MASLASHNOPB datasheet(18/42 Pages) TI2

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10k

100k

10M

100M

-20

100

FREQUENCY (Hz)

PHASE

AVOL

with ADDITIONAL

COMPENSATION

GBP

nd POLE

ADDITIONAL

COMPENSATION

45°PHASE

MARGIN

F f = f

1 +

RIN

1 +

RIN || RF

LMP7717, LMP7718

SNOSAY7H – MARCH 2007 – REVISED MARCH 2013

www.ti.com

(8)

From this formula, we can see that

•

1/F's zero is located at a lower frequency compared with 1/F's pole.

•

1/F's value at low frequency is 1 + RF/RIN.

•

This method creates one additional pole and one additional zero.

•

This pole-zero pair will serve two purposes:

–

To raise the 1/F value at higher frequencies prior to its intercept with A, the open loop gain curve, in order

to meet the Gmin = 10 requirement. For the LMP7717 some overcompensation will be necessary for good

stability.

–

To achieve the previous purpose above with no additional loop phase delay.

Please note the constraint 1/F

≥ Gmin needs to be satisfied only in the vicinity where the open loop gain A and

1/F intersect; 1/F can be shaped elsewhere as needed. The 1/F pole must occur before the intersection with the

open loop gain A.

In order to have adequate phase margin, it is desirable to follow these two rules:

Rule 1 1/F and the open loop gain A should intersect at the frequency where there is a minimum of 45° of phase

margin. When over-compensation is required the intersection point of A and 1/F is set at a frequency

where the phase margin is above 45°, therefore increasing the stability of the circuit.

Rule 2 1/F’s pole should be set at least one decade below the intersection with the open loop gain A in order to

take advantage of the full 90° of phase lead brought by 1/F’s pole which is F’s zero. This ensures that the

effect of the zero is fully neutralized when the 1/F and A plots intersect each other.

Calculating Lead-Lag Compensation for LMP7717

Figure 50 is the same plot as Figure 46, but the AVOL and phase curves have been redrawn as smooth lines to

more readily show the concepts covered, and to clearly show the key parameters used in the calculations for

lead-lag compensation.

Figure 50. LMP7717/LMP7718 Simplified Bode Plot

To obtain stable operation with gains under 10 V/V the open loop gain margin must be reduced at high

frequencies to where there is a 45° phase margin when the gain margin of the circuit with the external

compensation is 0 dB. The pole and zero in F, the feedback factor, control the gain margin at the higher

frequencies. The distance between F and AVOL is the gain margin; therefore, the unity gain point (0 dB) is where

F crosses the AVOL curve.

For the example being used RIN = RF for a gain of −1. Therefore F = 6 dB at low frequencies. At the higher

frequencies the minimum value for F is 18 dB for 45° phase margin. From Equation 5 we have the following

relationship:

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