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STM32U073RCU3 Datasheet(PDF) 8 Page - STMicroelectronics |
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STM32U073RCU3 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 146 page ![]() 3.4 Memories 3.4.1 Embedded flash memory STM32U073x8/B/C devices feature up to 256 Kbytes of embedded flash memory available for storing code and data. Flexible protections can be configured thanks to option bytes: • Robust readout protection (RDP) with password-based regression (128-bit PSWD). Three protections level states are available: – Level 0: no readout protection – Level 1: memory readout protection: the flash memory cannot be read from or written to if either debug features are connected, boot in RAM or bootloader is selected – Level 2: chip readout protection: debug features (Cortex-M0+ serial wire), boot in RAM and bootloader selection are disabled. This selection is irreversible. Refer to Table 2 for the memory area access versus the RDP protection level. • Write protection (WRP): the protected area is protected against erasing and programming. Two areas per bank can be selected, with 2-Kbyte granularity. Table 2. Access status versus readout protection level and execution modes Area Protection level User execution Debug, boot from RAM or boot from system memory (loader) Read Write Erase Read Write Erase User memory 1 Yes Yes Yes No No No 2 Yes Yes Yes N/A N/A N/A System memory 1 Yes No No Yes No No 2 Yes No No N/A N/A N/A Option memory 1 Yes Yes Yes Yes Yes Yes 2 Yes No No N/A N/A N/A Backup memory 1 Yes Yes N/A(1) No No N/A(1) 2 Yes Yes N/A N/A N/A N/A 1. Erased upon RDP change from Level 1 to Level 0. The whole nonvolatile memory embeds the error correction code (ECC) feature supporting: • Single error detection and correction • Double error detection • Readout of the ECC fail address from the ECC register Securable area A part of the flash memory can be hidden from the application once the code it contains is executed. As soon as the security is enabled on the securable area through the FLASH_HDPCR and FLASH_SECR registers, the securable memory cannot be accessed until the system resets. The securable area generally contains the secure boot code to execute only once at boot. This helps to isolate secret code from untrusted application code. 3.4.2 Embedded SRAM STM32U073x8/B/C devices have 40-Kbyte SRAM with hardware parity check. Hardware parity check allows memory data errors to be detected, which contributes to increasing functional safety of applications. STM32U073x8/B/C Functional overview DS14548 - Rev 2 page 8/146 |
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